Nima Maghari

 


To see my CV in pdf, click here.



Publications

Journal Papers

  1. N. Maghari, and U. Moon, "A Third-Order DT ∆∑ Modulator Using Noise-Shaped Bi-directional Single-Slope Quantizer," ,IEEE J. Solid-State Circuits, Vol. 41, pp 2882-2891, Dec. 2011.

  2. S. Weaver, B. Hershberg, N. Maghari and U. Moon, “Domino Logic Based ADC Intended for Digital Synthesis,” IEEE Transactions on Circuits and Systems—II: Express Briefs, Vol. 42, pp 744-747, Nov. 2011.

  3. T. Oh, N. Maghari, D. Gubbins, and U. Moon, "Analysis of Residue Integration Sampling With Improved Jitter Immunity," IEEE Transactions on Circuits and Systems—II: Express Briefs, Vol 58, pp 417-421, July 2011.

  4. Y. Hu, N. Maghari, T. Musah, U. Moon, “Time-Interleaved Noise-Shaped Integrating Quantizers,” IEE Electron Lett., April 2010. (PDF)

  5. O. Rajaee, T. Musah, N. Maghari, S. Takeuchi, M. Aniya, K. Hamashita, and U. Moon, “Design of a 79dB 80MHz 8x-OSR Hybrid Delta-Sigma/Pipelined ADC ”,IEEE J. Solid-State Circuits, Vol 45, No. 4, Apr. 2010.(PDF)
     
  6. N. Maghari, G. C. Temes, and U. Moon, “Noise-Shaped Integrating Quantizers in ΔΣ Modulators”, IEE Electron. Lett., vol. 42, pp. 612-613, June 2009. (PDF)

  7. N. Maghari, S. Kwon, G. C. Temes, and U. Moon, “74dB SNDR Multi-Loop Sturdy-MASH Delta-Sigma Modulator Using 35dB Opamp Gain,” IEEE J. Solid-State Circuits special issue on custom integrated circuit design, vol. 44, No. 8, page 2212-2221, Aug 2009. (PDF)

  8. N. Maghari, G. C. Temes, and U. Moon, “Single-Loop ΔΣ Modulator with Extended Dynamic Range,” IEE Electron. Lett., vol. 44, No. 25, pp. 1452-1453, Dec. 2008. (PDF)

  9. N. Maghari, S. Kwon, G. C. Temes, and U. Moon, “Sturdy MASH Δ-Σ Modulator,” IEE Electron. Lett., vol. 42, pp. 1269-1270, Oct. 2006. (PDF)

  10. M. Yavari, N. Maghari, and O. Shoaei, “An Accurate Analysis of Slew-Rate for Two-Stage CMOS Opamps,” IEEE Transactions on Circuits and Systems—II: Express Briefs, March 2005. (PDF)

Conference Papers

  1. T. Oh, N. Maghari, U. Moon, "A 5MHz BW 70.7dB SNDR noise-shaped two-step quantizer based ΔΣ ADC," VLSI Circuits (VLSIC), 2012 Symposium on , pp.162-163, 13-15 June 2012.

  2. M. Gande, N. Maghari, T. Oh, Un-Ku Moon; , "A 71dB dynamic range third-order ΔΣ TDC using charge-pump," VLSI Circuits (VLSIC), 2012 Symposium on,  pp.168-169, 13-15 June 2012.

  3. B. R. Gregoire, T. Musah, N. Maghari, S.Weaver and U. Moon, "A 30% Beyond VDD Signal Swing 9-ENOB Pipelined ADC using a 1.2V 30dB Loop-Gain Opamp", in proceedings of IEEE Asian solid-state circuits conference (a-sscc), 2011.

  4. N. Maghari and U. Moon, “A Third-Order DT ∆∑ Modulator Using Noise-Shaped Bi-directional Single-Slope Quantizer,”  IEEE digest of International Solid-State Circuits Conference, ISSCC 2011.

  5. N Maghari, S. Weaver, U. Moon, “A +5dBFS Third-Order Extended Dynamic Range Single-Loop ∆∑ Modulator,” proc. IEEE Custom Integrated Circuits Conference (CICC), pp. 1-4, Sep 2010. (PDF)

  6. N. Maghari and U. Moon, “A Double-Sampled Path-Coupled Single-Loop ΔΣ Modulator Using Noise-Shaped Integrating Quantizer,” proc. Of IEEE Int. Symp. On Circuits and Systems, ISCAS 2010. (PDF)

  7. N. Maghari and U. Moon, “Precise Area-Controlled Return-to-Zero Current Steering DAC with Reduced Sensitivity to Clock Jitter,” proc Of IEEE Int. Symp. On Circuits and Systems, ISCAS 2010. (PDF)

  8. N. Maghari, S. Kwon, G. C. Temes, and U. Moon, “74dB SNDR Multi-Loop Sturdy-MASH Delta-Sigma Modulator Using 35dB Opamp Gain,” IEEE Custom Integrated Circuits Conference (CICC), pp. 101-104, Sep 2008. (PDF)

  9. N. Maghari and U Moon, “Multi-loop efficient Delta-Sigma Modulators” IEEE International Symposium on Circuits and Systems, ISCAS, pp. 1216-1219, May 2008. (PDF)

  10. O. Rajaee, N. Maghari and U. Moon “Time-Shifted CDS Enhancement of Comparator-Based MDAC for Pipelined ADC Applications,” IEEE Int. Conf. on circ. And Syst. ICECS 2007, pp 210-213, Dec 2007. (PDF)

  11. N. Maghari, S. Kwon, G. C. Temes, and U. Moon, “Mixed-order sturdy MASH Δ-Σ modulator” proc. Of IEEE Int. Symp. On Circuit and System, ISCAS, May 2007, pp 257-260. (PDF)

  12. N. Maghari, and O. Shoaei, “A Dynamic Start-Up Circuit for Low Voltage CMOS Current Mirrors with Power-Down Support,” IEEE International Symposium on Circuits and Systems, ISCAS, pp. 4265-4268,2005. (PDF)

  13. N. Maghari, M. Yavari, and O. Shoaei, “An Analytical Model for the Slewing Behavior of Two-Stage CMOS OTAs,” IEEE International Symposium on Circuits and Systems, ISCAS, pp. I 553-556,2004. (PDF)

Professional Affiliations, Awards & Talks

Awards

Honors

 

Seminars & Talks

 

Professional Activities